The present invention relates to image memory diagnostic systems for diagnosing the operation of an image memory of a display unit for displaying characters and/or graphics.
FIG. 4 shows the organization of a conventional display unit constructed based on the display unit disclosed in IBM Technical Reference Options and Adapters Volume 2. This display unit includes a system bus 1, a system data bus 1a connected to the system bus 1, a system address bus 1b connected to the system bus 1, a command bus 1c connected the system bus 1, a CRT controller 2 for generating various control signals to be described later, a CRT address bus 2a for transmitting a CRT address from the CRT controller 2, a memory control line 2b for transmitting a memory control signal from the CRT controller 2, a video control line 2c for transmitting a video control signal from the CRT controller 2, a selector 3 for choosing between the system address bus 1b and the CRT address bus 2a, a memory address bus 3a for transmitting a selected signal, an image memory 4 for storing video data, a memory read data bus 4a for transmitting memory read data from the image memory 4, a parallel/serial converter 5 for converting parallel memory read data into serial data, a video data line 5a for transmitting data from the parallel/serial converter 5, a video control circuit 6 for displaying a picture image at a display device, such as CRT or LCD, and a video signal line 6a for transmitting a video signal to the display device.
In operation, in response to a command input at the command bus 1c, the CRT controller 2 outputs at the memory control line 2b a memory control signal, causing the selector 3 to select a system address at the system address bus 1b and output it at the memory address bus 3a as a memory address. At this address, the image memory 4 writes system data from the system data bus 1a.
In response to a command signal from the command bus 1c, the CRT controller 2 then outputs a CRT address at the CRT address bus 2a, a memory control signal at the memory control line 2b, and a video control signal at the video control line 2c. In response to the memory control signal at the memory control line 2b, the selector 3 selects at this time a CRT address at the CRT address bus 2a and outputs a memory address at the memory address bus 3a. The image memory 4 outputs at the memory read data bus 4a a parallel video data (memory read data) accessed by the above memory address and memory control signals.
The parallel/serial converter 5 then converts the above read data into serial data and feeds it to the video control circuit 6 via the video data line 5a. In response to a video control signal from the video control line 2c and data from the video data line 5a, the video control circuit 6 generates and feeds a video signal to the display device via the video signal line 6a. Thus, the display device displays a picture line corresponding to the video data provided via the system data bus 1a. This operation is repeated over the entire lines of the screen to provide a picture field or frame. This field operation is repeated to provide a continuous motion or still picture on the display.
FIG. 5 shows a sequential relationship among the memory address signal, memory control signal, and memory read data in the conventional display unit. The memory address signal is either a CRT address signal or a system address signal output at the memory address bus 3a by the selector 3 in FIG. 4. The memory control signals include a row address select signal (RAS), a column address select signal (CAS), an output enable signal (OE), and a write enable signal (WE). A symbol *1 represents both output and write enable signals from the system bus 1 which are enabled in response to access to the memory 4. The memory read data is a signal output from the image memory 4 at the memory read data bus 4a. This memory read data is output at the read data bus 4a when the RAS, CAS, and OE signals are low and the WE signal is high, with the CRT address signal provided at the CRT address bus 3a.
In order to diagnose the image memory of the above display unit, it is necessary to repeatedly execute the diagnostic program of a processing system for transmitting a system address to write in the image memory the test data from the processing system or read data from the image memory for comparison between the read data and the test data in the processing system. Consequently, such conventional image memory diagnosis not only takes a considerable amount of time but also puts an additional load on the processing system for fault diagnosis.